The present disclosure relates generally to filtering using integrated circuits, such as field programmable gate arrays (FPGAs). More particularly, the present disclosure relates to Winograd-based filtering operations implemented for an integrated circuit (e.g., an FPGA).
This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present disclosure, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
Integrated circuits (ICs) take a variety of forms. For instance, field programmable gate arrays (FPGAs) are integrated circuits that are intended as relatively general-purpose devices. FPGAs may include logic that may be programmed (e.g., configured) after manufacturing to provide any desired functionality that the FPGA is designed to support. Thus, FPGAs contain programmable logic, or logic blocks, that may be configured to perform a variety of functions on the FPGAs, according to a designer's design. For instance, FPGAs may be used to filter data. However, traditional filtering utilizes multiplication operations equal to a number of inputs times the number of filters for each calculated output. For example, filtering four inputs with three filter elements results in six multiplications for two outputs. Such multiplication operations contribute greatly to increased processing time thereby reducing efficiency of the filtering process.